{"id":24513,"date":"2025-12-06T09:01:57","date_gmt":"2025-12-06T00:01:57","guid":{"rendered":"https:\/\/blog.agentsoft.co.kr\/index.php\/2025\/12\/06\/24513\/"},"modified":"2025-12-06T09:01:57","modified_gmt":"2025-12-06T00:01:57","slug":"%ec%84%9c%ea%b0%95%eb%8c%80%ed%95%99%ea%b5%90-23%eb%85%84%eb%8f%84-%eb%a7%88%ec%9d%b4%ed%81%ac%eb%a1%9c%ed%94%84%eb%a1%9c%ec%84%b8%ec%84%9c%ec%9d%91%ec%9a%a9%ec%8b%a4%ed%97%98-7%ec%a3%bc%ec%b0%a8-lab0","status":"publish","type":"post","link":"https:\/\/blog.agentsoft.co.kr\/index.php\/2025\/12\/06\/24513\/","title":{"rendered":"\uc11c\uac15\ub300\ud559\uad50 23\ub144\ub3c4 \ub9c8\uc774\ud06c\ub85c\ud504\ub85c\uc138\uc11c\uc751\uc6a9\uc2e4\ud5d8 7\uc8fc\ucc28 Lab07 \uacb0\uacfc\ub808\ud3ec\ud2b8 (A+\uc790\ub8cc)"},"content":{"rendered":"

<\/p>\n

\ubaa9\ucc28<\/strong><\/p>\n

1. Interrupt types & Vector table
\n2. Interrupt pending behavior.
\n3. Interrupt Sequence
\n4. Interrupt return
\n5. NVIC
\n6. Interrupt priority register (NVIC_IPRx)
\n7. External interrupt\/event controller (EXTI)
\n8. Priority
\n9. Interrupt latency
\n10. Software interrupt
\n11. System control block (SCB)<\/p>\n

\ubcf8\ubb38\ub0b4\uc6a9<\/strong><\/p>\n

1.\ubaa9\uc801
\n– \uc778\ud130\ub7fd\ud2b8\uc758 \ub3d9\uc791\uc6d0\ub9ac\ub97c \uc774\ud574\ud55c\ub2e4. \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud588\uc744 \ub54c, stack\uc774 \uc5b4\ub5bb\uac8c \uc0ac\uc6a9\ub418\ub294\uc9c0 \uc774\ud574\ud55c\ub2e4.
\n– vector table\uc758 \uad6c\uc131\uacfc \uc5ed\ud560\uc5d0 \ub300\ud574 \uc774\ud574\ud55c\ub2e4.
\n– \uc778\ud130\ub7fd\ud2b8\uc758 \ucc98\ub9ac\uacfc\uc815\uc5d0\uc11c \uc0ac\uc6a9\ub418\ub294 \ub808\uc9c0\uc2a4\ud130\ub4e4\uc758 \uc885\ub958 \ubc0f \uc5ed\ud560\uc744 \uc774\ud574\ud55c\ub2e4.<\/p>\n

2.\uc774\ub860
\n2-1. Interrupt types % Vector table
\n \uc778\ud130\ub7fd\ud2b8\ub780, \ub9c8\uc774\ud06c\ub85c\ud504\ub85c\uc138\uc11c\uc5d0\uc11c \uc678\ubd80\uc5d0\uc11c \uc2a4\uc704\uce58\uac00 \ub20c\ub9ac\uac70\ub098 \ud1b5\uc2e0\uc5d0\uc11c \uc2e0\ud638\uac00 \uc218\uc2e0\ub418\ub294 \ub4f1 \uc608\uae30\uce58 \ubabb\ud55c \uc0c1\ud669, \uc0ac\uac74\uc744 \uc758\ubbf8\ud55c\ub2e4. \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud55c\ub2e4\uba74, \ud504\ub85c\uc138\uc11c\ub294 \uba85\ub839\uc5b4 \uc218\ud589\uc744 \ub9c8\uce5c \ud6c4, \ud574\ub2f9 \uc778\ud130\ub7fd\ud2b8\uc758 \ucc98\ub9ac\ub97c \ud558\ub294 \uc11c\ube0c\ub8e8\ud2f4\uc778 interrupt service routine(ISR)\uc744 \uc218\ud589\ud558\uba70 \ucc98\ub9ac\ud558\uac8c \ub41c\ub2e4. exception \ub610\ud55c interrupt\uc758 \ud55c \uc885\ub958\uc778\ub370, exception\uc740 \uc2dc\uc2a4\ud15c\uc5d0 \uc601\ud5a5\uc744 \ubbf8\uce60\ub9cc\ud55c \uc624\ub958\ub098 \ubb38\uc81c\uc5d0\uc11c \ubc1c\uc0dd\ud558\ub294 \uac83\uc73c\ub85c \uad6c\ubd84\ub41c\ub2e4.<\/p>\n

table 7.2\ub294 STM32F103xx\uc758 vector table\uc758 \uc77c\ubd80\ub97c \ubcf4\uc5ec\uc900\ub2e4. 0~15\ubc88\uae4c\uc9c0\ub294 exception\uc774\uace0, 16\ubc88\ubd80\ud130\ub294 \uc778\ud130\ub7fd\ud2b8\uc5d0 \ub300\ud574 \ubc88\ud638\uac00 \ubd80\uc5ec\ub41c\ub2e4. vector table\uc758 Address column\uc744 \ubcf4\uba74, \uac01 \uc778\ud130\ub7fd\ud2b8\uc5d0 \ub300\ud574 0x00000000\ubd80\ud130 4\ub2e8\uc704\ub85c \uc808\ub300\uc8fc\uc18c\uac00 \ubd80\uc5ec\ub418\uc5b4 \uc788\ub2e4. \uc774\ub807\uac8c \uc778\ud130\ub7fd\ud2b8 \ubc88\ud638\uc5d0 4\ub97c \uacf1\ud55c \uc704\uce58\uc5d0, ISR\uc758 \uc2dc\uc791 \uc8fc\uc18c\uac00 \uc800\uc7a5\ub418\uc5b4 \uc788\ub2e4. <\/p>\n

2-2. Interrupt pending behavior.<\/p>\n

\uc678\ubd80 \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud588\ub2e4\uba74, \uace7\ubc14\ub85c \ucc98\ub9ac\ub418\ub294 \uac83\uc774 \uc544\ub2c8\ub77c, \uc778\ud130\ub7fd\ud2b8\uac00 \ucc98\ub9ac\ub420 \ub54c\uae4c\uc9c0 \ub300\uae30\ud558\uac8c \ub41c\ub2e4. \uc774\ub807\uac8c \ub300\uae30\ud558\ub294 \uc0c1\ud0dc\ub97c pending\uc774\ub77c\uace0 \ud558\ub294\ub370, \ud504\ub85c\uc138\uc11c\ub294 pending\ub418\uc5b4\uc788\ub294 \uc778\ud130\ub7fd\ud2b8\ub4e4\uc744 \uc6b0\uc120\uc21c\uc704\uc5d0 \ub9de\uac8c \ucc98\ub9ac\ud55c\ub2e4. \ud504\ub85c\uc138\uc11c\ub294 \uc778\ud130\ub7fd\ud2b8\ub97c \ucc98\ub9ac\ud560 \ub54c, Thread mode\uc5d0\uc11c Handler mode\ub85c \ubaa8\ub4dc\ub97c \ubcc0\uacbd\ud558\uace0, ISR\uc744 \uc218\ud589\ud560 \ub54c \ud574\ub2f9 \uc778\ud130\ub7fd\ud2b8\uc758 pending\uc0c1\ud0dc\ub97c \ud574\uc81c\ud55c\ub2e4. <\/p>\n

figure 7.3\ucc98\ub7fc, \uc778\ud130\ub7fd\ud2b8\uac00 pending\uc0c1\ud0dc\uc5d0\uc11c \ucc98\ub9ac\ub418\uc9c0 \uc54a\uace0 \uc788\ub2e4\uba74, NVIC\uc758 interrupt control register\uc5d0 \uc758\ud574 software\uc801\uc73c\ub85c \ucde8\uc18c\ub420 \uc218\ub3c4 \uc788\ub2e4.<\/p>\n

figure 7.5\ucc98\ub7fc, \uc778\ud130\ub7fd\ud2b8 \uc694\uccad\uc774 \uacc4\uc18d\ud574\uc11c active\uc77c \uacbd\uc6b0, ISR \ucc98\ub9ac\uac00 \ub05d\ub09c \ud6c4\uc5d0 \ub2e4\uc2dc pending\ub41c\ub2e4. \uc774\ub7f4 \uacbd\uc6b0 \ud55c\ubc88\uc758 \uc778\ud130\ub7fd\ud2b8\ub97c \ub450 \ubc88 \uc774\uc0c1 \ucc98\ub9ac\ud558\ub294 \ubd88\uc0c1\uc0ac\uac00 \ubc1c\uc0dd\ud560 \uc218 \uc788\uae30\uc5d0, \uc778\ud130\ub7fd\ud2b8\ub97c \ucc98\ub9ac\ud560 \ub54c \uc778\ud130\ub7fd\ud2b8 \uc694\uccad \uc2e0\ud638\ub97c software\uc801\uc73c\ub85c clear\ud560 \ud544\uc694\uac00 \uc788\ub2e4.<\/p>\n

\ud558\uc9c0\ub9cc figure 7.7\ucc98\ub7fc \uc778\ud130\ub7fd\ud2b8 \uc694\uccad\uc774 \ud574\uc81c\ub41c \ud6c4 \ub2e4\uc2dc \ub098\ud0c0\ub09c\ub2e4\uba74, \ub2e4\uc2dc pending\ub41c\ub2e4. \uadf8\ub9ac\uace0 figure 7.6\ucc98\ub7fc \uc778\ud130\ub7fd\ud2b8 \uc694\uccad\uc774 pulse\ud615\ud0dc\ub85c \ubc18\ubcf5\ud574\uc11c \ub098\ud0c0\ub09c\ub2e4\uba74, \ud55c\ubc88\ub9cc pending\ub41c\ub2e4.<\/p>\n

\ucd9c\ucc98 : \ud574\ud53c\ucea0\ud37c\uc2a4<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

\ubaa9\ucc28 1. Interrupt types & Vector table 2. Interrupt pending behavior. 3. Interrupt Sequence 4. Interrupt return 5. NVIC 6. Interrupt priority register (NVIC_IPRx) 7. External interrupt\/event controller (EXTI) 8. Priority 9. Interrupt latency 10. Software interrupt 11. System control block (SCB) \ubcf8\ubb38\ub0b4\uc6a9 1.\ubaa9\uc801 – \uc778\ud130\ub7fd\ud2b8\uc758 \ub3d9\uc791\uc6d0\ub9ac\ub97c \uc774\ud574\ud55c\ub2e4. \uc778\ud130\ub7fd\ud2b8\uac00 \ubc1c\uc0dd\ud588\uc744 \ub54c, stack\uc774 \uc5b4\ub5bb\uac8c \uc0ac\uc6a9\ub418\ub294\uc9c0 \uc774\ud574\ud55c\ub2e4. […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[27140,2177,15718,8024,30467,30468,30469,5955,5650],"class_list":["post-24513","post","type-post","status-publish","format-standard","hentry","category-uncategorized","tag-4-5-","tag-2177","tag-15718","tag-8024","tag-30467","tag-30468","tag-30469","tag-5955","tag-5650"],"_links":{"self":[{"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/posts\/24513","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/comments?post=24513"}],"version-history":[{"count":0,"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/posts\/24513\/revisions"}],"wp:attachment":[{"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/media?parent=24513"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/categories?post=24513"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blog.agentsoft.co.kr\/index.php\/wp-json\/wp\/v2\/tags?post=24513"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}